Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL

Introductory VHDL: From Simulation to Synthesis

Circuit Design With VHDL by Volnei A. Pedroni

Performance and Fault Modeling With Vhdl

Introductory VHDL : From Simulation to Synthesis Sudhakar Yalaman

Introductory VHDL: From Simulation to Synthesis by Yalamanchili, Sudhakar

Introductory VHDL : From Simulation to Synthesis by Sudhakar Yalaman, NEW